Memory devices including semiconductor elements are broadly classified into two categories: a volatile memory device that loses stored data when not powered, and a non-volatile memory device that holds stored data even when not powered.
A typical example of a volatile memory device is a dynamic random access memory (DRAM). A DRAM stores data in such a manner that a transistor included in a memory element is selected and charge is accumulated in a capacitor.
Owing to the above principle, charge in a capacitor is lost when data in a DRAM is read out; thus, another writing operation is needed every time data is read out. Moreover, a transistor included in a memory element has leakage current (off-state current) between a source and a drain in an off state and charge flows into or out even if the transistor is not selected, which makes a data holding period short. For that reason, another writing operation (refresh operation) is necessary at predetermined intervals, and it is difficult to sufficiently reduce power consumption. Furthermore, since stored data is lost when power supply stops, another memory device utilizing a magnetic material or an optical material is needed in order to hold the data for a long time.
Another example of a volatile memory device is a static random access memory (SRAM). An SRAM holds stored data by using a circuit such as a flip-flop and thus does not need refresh operation, which is an advantage over a DRAM. However, cost per capacity is increased because a circuit such as a flip-flop is used. Moreover, as in a DRAM, stored data in an SRAM is lost when power supply stops.
A typical example of a non-volatile memory device is a flash memory. A flash memory includes a floating gate between a gate electrode and a channel formation region in a transistor and stores data by holding charge in the floating gate. Thus, a flash memory has advantages in that the data holding period is extremely long (semi-permanent) and refresh operation which is needed in a volatile memory device is not needed (e.g., see Patent Document 1).
However, in a flash memory, there is a problem in that a memory element does not function after repeated writing operations because a gate insulating layer included in the memory element deteriorates due to tunneling current generated in the writing operations. In order to avoid this problem, a method in which the number of writing operations is equalized among the memory elements can be employed for example, but a complicated peripheral circuit is needed to realize this method. Moreover, even when such a method is employed, the fundamental problem of lifetime is not resolved. In other words, a flash memory is not suitable for applications in which data is frequently rewritten.
In addition, high voltage is needed for injecting charge to a floating gate or removing the charge, and a circuit therefor is required. Further, it takes a relatively long time to inject or remove charge, and it is not easy to increase the speed of writing and erasing data.
[Reference]
    Patent Document 1: Japanese Published Patent Application No. S57-105889